Journals
Books
Articles by keyword система на кристалле
Massively-parallel processing architecture of - system-on-chip - class devices for high-performance statistical processing in measurement and control systems
I. E. Tarasov
Video Encoder Ip Core Designed for Sub-Micron System on Chip Integrated Circuits
P. S. Khabarov, D. L. Shlemin, V. D. Lys, Y. P. Lebedev, V. Yu. Vasilyev, Yu. N. Popov, Yu. N. Chepin
New approaches to obtain overteraflop performance and to expand the range of use for NeroMatrix family SoCs

V.M. Chernikov – Ph.D.(Eng.), Main Designer – Head of Department, RC «Module» (Moscow)

E-mail: tchern@module.ru

P.E. Viksne – Head of Sector, RC «Module» (Moscow) E-mail: pvixne@module.ru

Car radars on chip

Yu.V. Koltzov

Nizhegorodskiy Research Institute (Nizhny Novgorod, Russia)

Intellectual capabilities of cluster analysis 5G-6G Transition Neuroprocessor Resource Architectures

V.N. Ruchkin1, B.V. Kostrov2, V.A. Fulin3

1,3 Ryazan State University named after S.A. Yesenin (Ryazan, Russia)
2 Ryazan State Radio Engineering University n. a. V.F. Utkin (Ryazan, Russia)
 

Test and simulation system of speech-converting device micro-assembly

I.V. Zhukova – Undergraduate, Department «Computer systems and networks», Kaluga branch of the Bauman MSTU E-mail: zhukova.irina93@gmail.com

A.V. Rodionov – Ph.D.(Eng.), Associate Professor, Department «Computer systems and networks»,  Kaluga branch of the Bauman MSTU

E-mail: andviro@gmail.com

I.V. Chukhraev – Ph.D.(Eng.), Associate Professor, Head of Department «Computer systems and networks»,  Kaluga branch of the Bauman MSTU

E-mail: chukhraev@bmstu-kaluga.ru