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Journal Achievements of Modern Radioelectronics №3 for 2026 г.
Article in number:
An implementation variant for GNSS signal acquisition
Type of article: scientific article
DOI: https://doi.org/10.18127/j20700784-202603-04
UDC: 621.396
Authors:

M.E. Sergeev1, K.A. Kulichkov2, A.V. Grebennikov3

1-3 JSC «SPE «Radiosviaz» (Krasnoyarsk, Russia)

1 mihail.s3rg33v@yandex.ru; 2 kirill.kulichkov.92@mail.ru; 3 berg24@mail.ru

Abstract:

Meeting modern requirements for the time to first fix of navigation receivers after power-on necessitates optimizing all digital signal processing algorithms for execution speed, particularly the signal acquisition algorithm, which is the first stage of processing. Known multi-channel schemes [1-6], which provide rapid signal acquisition, require significant resources to implement a large number of parallel channels on Field-Programmable Gate Arrays (FPGAs) [11]. Under conditions of limited FPGA resources, an alternative is to implement the acquisition algorithm on the processor system within a System-on-Chip (SoC) using Fast Fourier Transform (FFT) algorithms, as well as by combining various acquisition methods.

Simulations of known signal acquisition methods were conducted under different accumulation modes with equal accumulation time intervals. The simulation showed that the algorithm's speed can be improved while maintaining sensitivity and the accuracy of initial radio navigation parameter estimates by combining methods and optimizing the program code.

The algorithm uses the FFT at the first stage to implement parallel search in the time domain in non-coherent accumulation mode over a 1 ms interval to obtain estimates of delay and Doppler shift with an uncertainty of ±500 Hz. The second stage performs a search in the frequency space in coherent accumulation mode over, for example, a 10 ms interval to refine the Doppler shift with an uncertainty of ±50 Hz at the known delay. Simulation of this algorithm, coupled with code optimization, showed that the time for a single pass through 32 GPS satellites was ≈ 0.636 s.

To implement the GNSS signal acquisition algorithm on the processor part, the hardware part of the FPGA must implement scheme of the decimated samples recorder. This circuit down-converts the input signal based on the Doppler shift, performs decimation by reducing the signal sampling rate by a factor of 32, and also forms complex signal samples (in-phase and quadrature components). The signal samples are written to DMA (Direct Memory Access) in a 32-bit format, where the first 2 bytes are the quadrature component and the second 2 bytes are the in-phase component.

A program in the C++ language [12] was developed for the SoC's processor part, implementing the reading of samples from the DMA channel and the acquisition of various GNSS signals. The loop body includes working with the decimated samples recorder, reading data from DMA, reading the timestamp for the start of data sampling, and acquisition algorithm. The results for the current satellite are written to an output file for transfer to the signal tracking system.

The results of outputting the signal delay and Doppler shift parameters for one satellite during cyclic execution of the search algorithm over one satellite pass shows that the error in determining the Doppler shift value does not exceed ±50 Hz.

The presented approach to implementing GNSS signal acquisition allows the same algorithm to be used for various signals from any GNSS – L1OF, L1C/A, B1C, E1. Combining methods improves the algorithm's speed while maintaining the sensitivity and accuracy of the initial estimates of radio navigation parameters.

Furthermore, individual elements of the algorithm can be applied in various practical tasks, including post-processing in software-defined receivers, as well as in working with multi-element antenna systems.

Pages: 24-31
For citation

Sergeev M.E., Kulichkov K.A., Grebennikov A.V. AnimplementationvariantforGNSSsignalacquisition. Achiev ements of modern radioelectronics. 2026. V. 80. № 3. P. 24–31. DOI: https://doi.org/10.18127/j20700784-202603-04 [in Russian]

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Approved after review: 08.12.2025
Accepted for publication: 14.01.2026