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Articles by keyword self-timed circuit
The technique of self-timed circuits computer-aided design wich uses functionally-complete tolerant basis
A.N. Kamenskih - Post-graduate Student, Assistant, Faculty of Electrical Engineering, Department of Automation and Remote Control, Perm National Research Polytechnic University. E-mail: antoshkinoinfo@yandex.ru S.F. Tyurin - Dr.Sc. (Eng.), Professor, Faculty of Electrical Engineering, Department of Automation and Telemechanics, Perm National Research Polytechnic University. E-mail: tyurinsergfeo@yandex.ru Ph.A. Ponomarev - Bachelor Student, Faculty of Mechanic and Mathematic, Perm National Research Polytechnic University. E-mail: phil_ponomare@mail.ru O.D. Barlamov - Bachelor Student, Faculty of Mechanic and Mathematic, Perm National Research Polytechnic University. E-mail: barlamov93@yandex.ru
Self-timed pipeline optimization

Yu.A. Stepchenkov1, Yu.G. Diachenko2, N.V. Morozov3, D.Yu. Stepchenkov4, D.V. Khilko5, D.Yu. Diachenko6

1–6 FRC “Computer Science and Control” of RAS (Moscow, Russia)
 

Self-timed circuits design automation

A.A. Zatsarinny1, Yu.A. Stepchenkov2, Yu.G. Diachenko3, N.V. Morozov4, D.Yu. Stepchenkov5

1–5 FRC CSC RAS (Moscow, Russia)
1 AZatsarinny@frscsc.ru, 2 YStepchenkov@ipiran.ru, 3 diaura@mail.ru, 4 NMorozov@ipiran.ru, 5 stepchenkov@mail.ru

Novel FPGA clock concept and dual-mode basic logic element

I.A. Sokolov1, S.F. Tyurin2, Yu.A. Stepchenkov3, Yu.G. Diachenko4, M.S. Nikitin5, S.I. Sovetov6

1,3,4 FRC “Computer Science and Control” of RAS (Moscow, Russia)
2,5,6 Perm National Research Polytechnic University (Perm, Russia)
1 ISokolov@ipiran.ru, 2 tyurinsergfeo@yandex.ru, 3 YStepchenkov@ipiran.ru,
4 diaura@mail.ru, 5 mann1k@yandex.ru, 6 fizikoz@gmail.com