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Articles by keyword logic gate
Regulation of Logic Gate Characteristics for Fully Depleted SOI CMOS Nanotransistors
N.V. Masalsky
SIMULATIONOFCHARACTERISTICS OF LOGIC GATE AND ARITHMETIC UNITS FOR FULLY DEPLETED SOI CMOS NANOTRANSISTORS
N.V. Masalsky
Minimizing Short Channel Effects to Performance of Double Gate-Underlap Design SOI CMOS Nanotransistors
N.V. Masalsky
Vertical CMOS nanotransistors with a conical channel for three-dimensional integrated circuits

Н.В. Masalsky1

1 Federal State Institution "Scientific Research Institute for System Analysis of RAS" (Moscow, Russia)