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Articles by keyword fully depleted soi nanotransistor
Regulation of Logic Gate Characteristics for Fully Depleted SOI CMOS Nanotransistors
N.V. Masalsky
SIMULATIONOFCHARACTERISTICS OF LOGIC GATE AND ARITHMETIC UNITS FOR FULLY DEPLETED SOI CMOS NANOTRANSISTORS
N.V. Masalsky
Low power 1-bit full adder characteristics for fully depleted SOI CMOS nanotransistors
N.V. Masalsky