Journals
Books
Articles by keyword processor architecture
Using recurrent neural networks for probabilistic classification of the processor architecture of executable files

A. A. Gladkikh¹, M. O. Komakhin², A. V. Simankov³, D. A. Uzenkov4

1, 2, 4 Department IU4 of Designing and Technology of Electronic Equipment, Bauman Moscow State Technical University (Moscow, Russia)

1–4  JSC “INFORION” (Moscow, Russia)

Development of the RISC-V architecture in electronic devices

N.V. Popov1, A.A. Bisov2, A.A. Chumachenko3

1–3 JSC «SPE «Radiosvyaz» (Krasnoyarsk, Russia)

1,3 Federal State Budgetary Educational Institution of Higher Education «Krasnoyarsk State Agrarian University» (Krasnoyarsk, Russia)

1 lestrange01@inbox.ru, 2 glutamine@mail.ru, 3 maijorishe@mail.ru