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Articles by keyword novel concept
Novel FPGA clock concept and dual-mode basic logic element

I.A. Sokolov1, S.F. Tyurin2, Yu.A. Stepchenkov3, Yu.G. Diachenko4, M.S. Nikitin5, S.I. Sovetov6

1,3,4 FRC “Computer Science and Control” of RAS (Moscow, Russia)
2,5,6 Perm National Research Polytechnic University (Perm, Russia)
1 ISokolov@ipiran.ru, 2 tyurinsergfeo@yandex.ru, 3 YStepchenkov@ipiran.ru,
4 diaura@mail.ru, 5 mann1k@yandex.ru, 6 fizikoz@gmail.com