Journals
Books
Articles by keyword VLIW
New approaches to obtain overteraflop performance and to expand the range of use for NeroMatrix family SoCs

V.M. Chernikov – Ph.D.(Eng.), Main Designer – Head of Department, RC «Module» (Moscow)

E-mail: tchern@module.ru

P.E. Viksne – Head of Sector, RC «Module» (Moscow) E-mail: pvixne@module.ru

Heterogeneous multicore system on chip with 512 Gflops peak performance

A.L. Eisymont – Head of Sector, RC «Module» (Moscow)

E-mail: eisymont@module.ru

V.M. Chernikov – Ph.D.(Eng.), Main Designer – Head of Department, RC «Module» (Moscow)

E-mail: tchern@module.ru

An.V. Chernikov – Head of Sector, RC «Module» (Moscow)

E-mail: chernant@module.ru

Al.V. Chernikov – Deputy Head of Department, RC «Module» (Moscow)

E-mail: achernikov@module.ru

D.E. Kosorukov – Head of Department, RC «Module» (Moscow)

E-mail: dkos@module.ru

I.I. Nasonov – Head of Sector, RC «Module» (Moscow)

E-mail: nasonov@module.ru

A.A. Komlev – Leading Engineer, RC «Module» (Moscow) E-mail: a.komlev@module.ru

Modern technologies of increasing the computing power of processors

V.A. Solovyov1, E.I. Azimov2, M.N. Yldashev3

1–3 Bauman Moscow State Technical University (Moscow, Russia)