A.V. Tuchin1, N.R. Krasikov2, V.K. Lanovoy3, P.A. Kondratovich4, A.Yu. Tkachev5, G.I. Glushkov6

1, 2, 4 Voronezh State University (Voronezh, Russia)
1–6 JSC «ICC Milandr» (Zelenograd, Moscow Region, Russia)
1tuchin.av@milandr.ru, 2krasikov.n@milandr.ru, 3lanovoy.v@milandr.ru, 4kondratovich.p@milandr.ru, 5tkachev.a@milandr.ru, 6glushkov.gi@milandr.ru

To protect the interfaces of high-speed ICs from ESD, it is necessary to develop and optimize specialized protection circuit designs to minimize parasitic capacitance. The classic widely used designs based on ggMOS and SCR have too large parasitic capacitance, which degrades the parameters of the interface pins of the ICs. It is necessary to develop and optimize other ESD protection designs. One of the possible promising options is optimized diode protection. In this paper, an analysis of the effect of the design of a diode protection on its electrical characteristics is carried out. An analysis of the possibility of modeling protection using SPICE models was also performed and an assessment of the need to use TCAD simulation was carried out. Based on a comparison of the results of SPICE and TCAD simulations, it is shown that widely used SPICE diode models not optimal for designing and optimizing diode ESD protection. For this task, it is necessary to use TCAD simulation, taking into account the self-heating of the structure and the dynamics of the propagation of the thermal front. The results of this work are used for the development of ESD protection for interfaces of high–speed microcontrollers, DACs/ADCs, and transceivers.

Tuchin A.V., Krasikov N.R., Lanovoy V.K., Kondratovich P.A., Tkachev A.Yu., Glushkov G.I. Analysis of the behavior of TCAD and SPICE diode models in ESD protection circuits. Nanotechnology: development and applications – XXI century. 2024. V. 16. № 3. P. 21–30. DOI: https://doi.org/10.18127/ j22250980-202403-03 (in Russian)

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