K.S. Kozorez1, A.V. Rashich2

1,2 Peter the Great St. Petersburg Polytechnic University (St. Petersburg, Russia)

1 kozorez_ks@spbstu.com; 2 rashich@cee.spbstu.com

In this paper, an approach to implementing a pipelined first-or der soft-output Reed-Muller decoder based on sign-magnitude com putations and modified comparators is presented. The complexity o f the proposed decoders based on the fast Hadamard transform (FHT) is analyzed and compared w ith the complexity of recursive decoders based on the discrepancy and correlation metrics. It is shown that the proposed component decoder provides reduced complexity and high performance, reaching 350 MHz for code lengths up to 32. The dependences of the hardware complexity of the Ree d-Muller decoder for various code lengths and input log-likelih ood ratio bit-widths are obtained.

Kozorez K.S., Rashich A.V. Hardware implementation of first-order Reed--Muller decoder with soft output. Radiotekhnika. 2026. V. 90. № 3. P. 139−149. DOI: https://doi.org/10.18127/j00338486-202603-12 (In Russian)

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