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Journal Radioengineering №3 for 2023 г.
Article in number:
Methodological apparatus for detecting and correcting errors in information processing devices in communication and telecommunications systems
Type of article: scientific article
DOI: https://doi.org/10.18127/j00338486-202303-14
UDC: 681.32.004.12:681.581.54
Authors:

A.A. Pavlov1, A.N. Tsarkov2, Yu. A. Romanenko3, I.I. Korneev4, A.Yu. Romanenko5, M.I. Makeev6, F.A. Pavlov7

1, 3, 4, 6, 7 Serpukhov Branch of Military Academy of the Strategic Missile Forces Peter the Great
(Serpukhov, Moscow Region, Russia)

2, 5 ANO “Institute of Engineering Physics” (Serpukhov, Moscow Region, Russia)

Abstract:

Modern development of information technology is characterized by the widespread use of specialized computers (SEVM).

The occurrence of errors and failures in these systems leads to emergency situations, and in some cases to catastrophic consequences, so there is a need to develop effective methods for their detection and correction.

An analysis of works in this area showed that the most effective method for detecting and correcting errors are corrective codes with syndromic decoding, which allow solving this problem using 10-30% of hardware costs for these purposes.

Currently, studies have been carried out that allow the use of correction codes to control the processor when performing arithmetic and logical operations, with the exception of the logical negation operation.

Important arithmetic operations of the ALU are multiplication and division.

The multiplication operation is carried out by the multiple operation of adding the multiplicand, determined by the value of the multiplier.

The division operation is carried out by repeatedly subtracting the divisor from the dividend (adding the dividend to the divisor presented in the additional code).

To represent the divisor in an additional code, the values of the information bits are first inverted, and a unit is added to the result, however, the existing algebraic codes do not allow detecting and correcting errors when performing the logical inversion operation.

Thus, there is a need to develop a code that detects and corrects errors when performing an arithmetic subtraction operation.

When solving the problem, the expediency of using algebraic linear codes for detecting and correcting errors in specialized computers is substantiated, which allows, in relation to the majority method and the duplication method, to significantly reduce hardware costs and use 10–30% of reserve equipment for these purposes.

The possibility of using corrective codes to correct processor errors during information processing has been established.

An example of using a Hamming code to correct processor errors during an addition operation is considered.

It is shown that the existing algebraic codes cannot be used to control the arithmetic operations of subtraction and division, since they do not allow controlling the logical inversion operation necessary to represent a negative number in an additional code.

An algorithm for constructing a code has been developed that makes it possible to control the logical operation of negation and, consequently, the representation of a negative number in an additional code. The parameters of the developed code are determined.

An example of using the proposed code to control the arithmetic operation of subtraction is considered.

The proposed methodological apparatus for error detection and correction makes it possible to use the developed code not only for protecting information storage and transmission devices, but also for correcting processor errors when performing subtraction and division arithmetic operations.

As a result of the research, a code was developed for detecting and correcting errors in the ALU of the processor of specialized computers.

In contrast to the methods of using codes to control the arithmetic operation of addition, the proposed code allows you to control the formation of an additional code to detect and correct errors when performing a subtraction (division) operation. The use of the proposed method makes it possible to significantly reduce hardware costs for detecting and correcting errors in a computer.

Pages: 148-155
For citation

Pavlov A.A., Tsarkov A.N., Romanenko Yu.A., Korneev I.I., Romanenko A.Yu., Makeev M.I., Pavlov F.A. Methodological apparatus for detecting and correcting errors in information processing devices in communication and telecommunications systems. Radiotekhnika. 2023. V. 87. № 3. P. 148−155. DOI: https://doi.org/10.18127/j00338486-202303-14 (In Russian)

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Date of receipt: 26.12.2022
Approved after review: 10.01.2023
Accepted for publication: 28.02.2023