V.F. Bezzubov - Ph.D. (Eng.), Director Closed joint-stock company «Promtechelectronica», Saint Petersburg. E-mail: Bezzubov_vf@mail.ru Y.N. Muzelin - Ph.D. (Eng.), Open join-stock company «ALL-Russian Scientific-Research Institute of Radio Equipment» («VNIIRA» JSC), Saint Petersburg. E-mail: yuri.muzelin@gmail.com S.S. Turbin - Post-graduate Student, Saint-Petersburg State Forest Technical University. E-mail: St.turbin@gmail.com

In mission-critical real-time computing systems of high availability are implemented the redundant computer systems where a significant indicator of the effectiveness of the system is the time of information exchange between the components of the computing system. The article details the analysis of arrangement the data exchange between the components of the computing system with the view to reduce the loss of performance of a computer system using two ways of organizing a high-speed data exchange between computing modules of the complex: through serial duplex link RapidIO-SRIO and based on intercomputer direct memory access. The use of high-speed full-duplex link SRIO for data exchange between complex-s computing modules (cores) leads to an increase in computing system-s performance losses while reducing the allowable recovery time of computing process, in comparison with the organization of data exchange based on the intercomputer direct memory access interface. It is shown that the use of the interface based on intercomputer direct memory access which implements the dual direct memory access reduces the time of information exchange between computing modules compared with duplex serial RapidIO-SRIO interface and provides an access to computing module-s memory with a failed processor, whereby there are additional possibility of providing information and functional security, fault tolerance and survivability of a computer system. Thus, for self-healing computing systems, the least recovery time of computing process is provided by the organization of data exchange between the complex-s computing modules (cores) on the base of intercomputer direct memory access.

 

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