The Bandwidth and Jammer Capability of the Integrated PLL/INS

A design technique for doppler-aided integrated PLL/INS has been developed. The technique keeps PLL optimal at given jammer power. A calculation method for the PLL bandwidth and jammer capability (J/S) has been presented, as well as inverse method for finding INS and oscillator-s characteristics at the desired J/S. The method guarantees top estimate of jammer capability. It is shown that in the case of aided PLL jammer capability does not depend on user dynamics but does depend on the dynamics of INS velocity error and the carrier oscillator frequency drift. Both latter processes can be merged into one summarized dynamic disturbance input.