The hardware implementation of artificial neuron
- 1,2 Post-graduate Student, Department of Electronics and Electrical Engineering, Novosibirsk State Technical University
- 3 Ph.D. (Eng.), Associate Professor, Department of Electronics and Electrical Engineering, Novosibirsk State Technical University
Abstract
The article proposes an analog hardware implementation of an artificial neuron, the nonlinearity of the transformations being maintained not at the circuitry level, but due to the nonlinearity of the physical processes occurring in CMOS transistors, which reduces the hardware costs of up to one transistor per synapse and three transistors per neuron body, increasing its sensitivity And reducing the accuracy of work. A model experiment shows the effect of increasing the stability of a neural network implementation of the same function with respect to a single-neural one.
How to cite
Сколота В.А., Белова И.А., Мартинович М.В. Аналоговая аппаратная реализация искусственного нейрона // Нейрокомпьютеры: разработка, применение. 2018. № 1. С. 54–59.
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