Four bit adder of four summands
- 1 Ph. D. (Eng.), Associate Professor, Department «Compute systems and networks», Kaluga branch of the Bauman MSTU
- 2 Assistant, Department «Compute systems and networks», Kaluga branch of the Bauman MSTU
- 3 Engineer, JSC «Typhoon» (Kaluga)
Abstract
This article presents a synthesis of the four-digit full adder of four summands. Job adder checked at the hardware level and on software models. The obtained results may become the basis for the development of multi-adders for 8, 16 and 32 bits.
How to cite
Максимов А.В., Максимова Е.А., Фролкина А.А. Четырехразрядный сумматор четырех слагаемых // Электромагнитные волны и электронные системы. 2015. № 7. С. 18–21.
References
- Branec V.N., SHmyglevskijj I.P. Primenenie kvaternionov v zadachakh orientacii tverdogo tela. M.: Nauka. 1973. 320 c.
- Sjuzev V.V. Osnovy teorii cifrovojj obrabotki signalov: Ucheb. posobie. M.: RTSoft. 2014. 752 s.
- Avt. svid. 12345678 SSSR. MKI G 06 F 7/50. CHetyrekhvkhodovojj odnorazrjadnyjj summator / CHizhikhin G.N. (SSSR). № 4746424/24; zajavl. 02.10.1989; opubl. 07.10.91. Bjul. № 37.
