An implementation variant of complex time-frequency synchronization signal

The time-frequency synchronization error achieved by used synchronization signal set does not meet the present requirements of user synchronization quality. The new complex time-frequency synchronization signal (CTFSS) allows achieving required synchroniza- tion error. A CTFSS implementation variant consists of two components: the carrier and the modulating signal of pseudorandom noise and message signal. The CTFSS former has a quadrature structure with subcarrier and single-sideband modulation. The CTFSS re- ceiver has the carrier phase estimation channel and the PRN delay estimation channel. The PRN delay is estimated by the delay de- tector response interpolation after the pre-search without a delay-locked loop. The CTFSS former and receiver hardware implementa- tion is performed on VHDL hardware description language and packed in IP core. The verification has made on laboratory model with FPGA, ADC and DAC.