350 rub
Journal Science Intensive Technologies №10 for 2012 г.
Article in number:
Injection methods of testing gate dielectric MOS IC
Authors:
V.V. Andreev, А.А. Stolyarov, V.G. Dmitriev, A.V. Romanov
Abstract:
At the present time the special place in the study of defects and the instability of the charge of the MOS systems belongs to the methods of using the injection of the carriers in the dielectric because of their sensitivity it is to electrically active defects. The appearance of new requirements for gate dielectric MOS IC and the need to identify potentially unreliable structures in the early stages of the technological process requires improvement of methods for control of obtaining gate dielectric. In this paper discusses the main methods of injection of charge carriers in gate dielectric of MOS-structures and features of their use for the quality control of nano-thickness dielectric films MOS integrated circuits. Special attention is paid to the description of the methods of controlled current stress and the two-level stress current and their application for the test of the parameters of MOS-structures in the modes of charge its capacity and high-field injection of electrons in the dielectric. In the article proposed the method of controlled stress current, allowing to carry out the measurement of the charge of the parameters of MOS-structures and injection of charge in oxide in the framework of one method. In the framework of the method proposed a new method of research of processes of generation and relaxation of positive charge in gate dielectric of MOS-structures under the tunnel at the Fowler-Nordheim injection of electrons from silicon, in which along with the stress level of the current, providing generators of positive charge, introduces an additional measuring the level of injection current, which is used for assessment of the change in the charge of dielectric. The use of this method allows to obtain a qualitatively new experimental data about the kinetics of positive charge in the large densities of tunneling current. The method of two-level stress current, used for the test of insulation defects and defects of charge stability nano-thickness gate dielectrics of MOS-structures.
Pages: 20-28
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