M. N. Selujanov

Discusses virtual circuit ADC with self-constructed on the basis of the environment of LabVIEW graphical programming. Given the front panel and block diagram of the virtual successive approximation ADC (PP) with self-monitoring in good condition ADC, and defective. Developed by the block diagram of the ADC contains a means of self-control independent of the width of the ADC. Shows the implementation of the external virtual means of self-control that contains two analog comparators and two digital-to-analog converters (DAC). On the basis of models of the virtual ADC with self-monitoring shows the functional diagram of the real ADC with self-monitoring on the control bar at the end of the conversion cycle. Self-control is made at the expense of the formation of two control voltages and comparison of the measured signal with test offsetting voltages. When this signal is formed "good" in the case of the measured signal in the admission control voltage or signal "not fit" in the opposite case. It is shown that the simulation troubleshooting the ADC with self-monitoring requires more reliable schemes ADC with self-monitoring to detect hidden faults, i.e. faults which were not detected at the code combination, but which may occur at a different code combinations, in case of which provide for compensation of the measured signal, however the error coding is beyond the tolerance. Proposed functional scheme of the ADC with self-monitoring with a shift of the code with a higher value of the fullness of self-control in comparison with the ADC under test self-control with the detection of faults, such as changes in the "weights "of discharges, as well as the failure of analogue all DAC type "const zero". In this ADC is the process of transformation and at the same time self-control with the fullness of self-control less than unity (since not detected such a malfunction of the ADC, in case of which provide for compensation of the measured signal failure bit switches of type "const zero" and such faults as changes in the "weights "bits). After the conversion is complete and the shift code the offset register on one bit to the right on additional verification step is self-control ADC with the fullness of self-control, equal to unity, as revealed the hidden faults, when occurrence of which is provided by balancing a measured voltage offsetting voltages. The technical result is the improvement of methodological validity of self - completeness of self-control. In connection with the fact that self-control after the code in the offset register shall be made in the bilateral admission for one cycle, and not in a unilateral admission for two-stage performance of self-control increases. In addition ADC with self-control has a feature to control any ADC, without self-control, the width of which coincides with a maximum of applied means of self-control (AGC), the maximum value of the input signal should be equal to the value of the reference voltage UJK, and under the control of the ADC of successive balancing the values of the sources of reference voltage of the ADC and IT should be the same.