V.E. Martirosov1, G.A. Alekseev2
1 Moscow Aviation Institute (National Research University) (Moscow, Russia)
2 Bureau 1440 LLC (Moscow, Russia)
An analytical review of methods of high-speed synchronization of devices based on phase-lock loop (PLL) systems is presented. Such classes of methods as nonlinear control, additional frequency discrimination, frequency search of the input signal, PLL loops with variable parameters are considered. The results of a speed study for two of the fastest structures of synchronization systems are presented: charge-pump phase-lock loop (CPPLL) and globally linearized synchronization system (GLSS). The results of comparison with the traditional PLL structure, as well as with the frequency search method (search PLL) are presented. In the course of simulation modeling in MATLAB/Simulink, time plots of signals in the studied synchronization systems for various values of the relative initial frequency detuning were obtained. The dependence of the frequency synchronization time on the magnitude of the initial frequency upsets obtained from the simulation results is presented. For the PLL search method (SPLL), an analytical dependence is shown, taking into account the maximum permissible search speed of frequency tuning. The results obtained show the advantage of GLSS in performance compared to CPPLL, which, with frequency detuning significantly exceeding the loop gain coefficient of the system, can reach an order or more. The undoubted advantage of the GLSS system is the obvious possibility of its implementation in a microchip design for use directly in the microwave frequency range. The presence of a family of synchronous signal generation and reception structures based on minor variations in the basic GLSS structure creates prerequisites for the use of such high-speed devices in promising radio engineering systems and complexes. The results of the work can be used in the development of high-speed modern digital systems of information transfer (DSIT).
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