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Journal Radioengineering №3 for 2014 г.
Article in number:
Construction of algorithms functional verification decoder model
Authors:
A.V. Bashkirov - Ph.D. (Eng.), associate professor, designing and manufacture of radio equipment chairs, Voronezh State Technical University
A.V. Muratov - Dr.Sci. (Eng), professor, head of designing and manufacture of radio equipment, Voronezh State Technical University
Yu.S. Naumenko - Post-graduate student, designing and manufacture of radio equipment chairs, Voronezh State Technical University
A.V. Sitnikov - Dr.Sci. (Phys.-Math.), professor, physics of solid state chairs, Voronezh State Technical University
A.V. Muratov - Dr.Sci. (Eng), professor, head of designing and manufacture of radio equipment, Voronezh State Technical University
Yu.S. Naumenko - Post-graduate student, designing and manufacture of radio equipment chairs, Voronezh State Technical University
A.V. Sitnikov - Dr.Sci. (Phys.-Math.), professor, physics of solid state chairs, Voronezh State Technical University
Abstract:
In this article the problem of verification decoder model used in the system of digital data transmission. Its relevance is associated with the need to control the accuracy of the calculations produced by decoding in the case of soft decisions demodulator.
Verification is carried out on RTL-level models of the decoder at the elementary algorithms of functioning. To enable the functional unit testing decoder developed algorithmic schemes which allow to localize inconsistencies RTL-code specifications, prompt correction of errors, using standard modeling tools.
For an example, the addition and multiplication modules, as well as a generator of test sequences, outstanding test vectors in the standard IEEE-754.
Pages: 72-76
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