A.N. Stalnov1, O.N. Andreeva2, E.G. Berger3

1,2 JSC “Concern Morinsis-Agat” (Moscow, Russia)

3 MIREA – Russian Technological University) (Moscow, Russia)

Relevance. With growing density of hardware there is a risk of multiple temporary fault which grows at order of magnitude prime concern for designers of new computer systems for safety-critical application. Hardware faults occur due to natural phenomena such as ionized radiation, variations in the manufacturing process, vibrations, etc. Computer systems devoted to critical-control applications must have an extremely high degree of reliability as faults in computer systems can cause vast economic losses and even endanger human life. Some computer systems have commercial, off-the-shelf components that do not provide the required degree of reliability. One solution to reliability problems is the creation of fault-tolerant systems. Redundant configurations of computer systems have been used in research and design to provide system fault tolerance. The fault tolerance is concerned with the continuation of the correct operation of a system despite an internal fault. Fault tolerance is achieved by using different methods of time redundancy, information redundancy, and software redundancy. Hardware redundancy is frequently used. Hardware fault tolerance is the most mature area in fault-tolerant computing. Many hardware fault tolerance techniques have been developed and used in practice in critical applications, ranging from telephone exchanges to space missions. In the past, the main obstacle to a wide use of hardware fault tolerance was the cost of the extra hardware required. With the continued reduction in the cost of hardware, this is no longer a significant drawback, and the use of hardware fault tolerance techniques is expected to increase. However, other constraints, notably on power consumption, may continue to restrict the use of massive redundancy in many applications. The task of designing and understanding fault-tolerant distributed system architectures is notoriously difficult: one has to stay in control of not only the standard system activities when all components are well, but also of the complex situations which can occur when some components fail. The difficulty of this task can be exacerbated by the lack of clear structuring concepts. In this regard, the analysis and systematization of methods and hardware solutions for fault-tolerant strategies of computing systems is relevant.

The aim of this paper is to analyze hardware solutions of fault-tolerant strategies for computing systems.

Results and their novelty. An element of the novelty of the work is the identified general development trends and problematic issues of the formation and functioning of mechanisms for ensuring the fault tolerance of hardware mechanisms of computing systems. This article discusses the basic concepts and relationships of hardware redundancy (redundancy) with the fault tolerance of computing systems. In particular, it is shown that hardware redundancy can range from simple redundancy to complex structures that include redundant blocks when the active ones fail. These forms of hardware redundancy are associated with high overhead costs, so their use is usually reserved for mission-critical systems where such overhead can be justified. The paper discloses the mechanisms of increasing reliability due to fault tolerance. The elements of fault-tolerant strategies and mechanisms of their implementation are identified.

Practical significance. The presented analysis will be useful for developers of computing systems to substantiate new technological solutions that ensure their hardware fault tolerance.

Stalnov A.N., Andreeva O.N., Berger E.G. Hardware solutions for fault-tolerant strategies for computing systems. Nonlinear World. 2022. V. 20. № 4. 2022. P. 38-50. DOI: https://doi.org/10.18127/j20700970-202204-04 (In Russian)

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