R. V. Vikhorev – Design Engineer of the 2nd cat., PJSC «Perm Scientific-Industrial Instrument Making Company»

E-mail: Vihrusvla@gmail.com

M. S. Nikitin – Student, Perm State National Research University; Electronic Technician of PJSC «Perm scientific-industrial instrument making company»

E-mail: Mann1k@yandex.ru

S. F. Tyurin – Dr.Sc. (Eng.), Professor, Honored Inventor of RF, Professor of Department of Automatics and Telemechanics, Perm National Research Polytechnic University; Professor of Department of Software Computing Systems, Perm State National Research University

E-mail: tyurinsergfeo@yandex.ru

The article consists of an introduction, three parts and a conclusion. In the introduction, the study relevance is substantiated; the task of topological analysis of the proposed elements of programmable logic integrated circuits for neural networks is set. The first part provides an analysis and topological simulation of the famous Look Up Table element. The second section provides an analysis and topological simulation of the proposed logical element for the implementation of several functions of a given number of arguments. The third section gives the results of topological simulation of a fault-tolerant inverter that uses redundancy at the transistor level.

In conclusion, authors made conclusion on the results of a study about the preference of the developed element and the proposed redundancy.

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