350 rub
Journal Neurocomputers №9 for 2014 г.
Article in number:
Construction of residue number system reverse onverters with error correction, based on mixed-number system
Keywords: modular arithmetic reverse conversion polyadic code
Authors:
V.M. Amerbaev - Dr.Sc. (Eng.), Main Research Scientist, Institution of the Russian Academy of Sciences, Institute of Design Problems in Microelectronics, Russian Academy of Sciences, Moscow, Russia. E-mail: NoFrost@inbox.ru
R.A. Soloviev - Ph.D. (Eng.), Head of Department, Institution of the Russian Academy of Sciences, Institute of Design Problems in Microelectronics, Russian Academy of Sciences, Moscow, Russia. E-mail: turbo@ippm.ru
D.V. Telpukhov - Ph.D. (Eng.), Research Scientist, Institution of the Russian Academy of Sciences, Institute of Design Problems in Microelectronics, Russian Academy of Sciences, Moscow, Russia. E-mail: NoFrost@inbox.ru
E.S. Balaka - Junior Research Scientist, Institution of the Russian Academy of Sciences, Institute of Design Problems in Microelectronics, Russian Academy of Sciences, Moscow, Russia. E-mail: Ssapra@hotbox.ru
Abstract:
Paper is devoted to the development of reverse converters with error correction. As a basic method for implementing acts converters transform operation in Polyadic code. It is shown that using the principle of combining repetitive parts, as well as some other architectural solutions can save equipment and increase the clock frequency of converters. Implemented generators functional descriptions and conducted experiments confirming certain approval. Assessing the results it can be concluded that the proposed method actually allows to not only reduce the area of the transducer, but also to increase the clock frequency.
Pages: 30-35
References

 

  1. Watson R.W., Hastings C.W. Self-Checked Computation Using Residue Arithmetic // Proceedings of the IEEE. December 1966. V. 54. № 12. P.1920-1931.
  2. Sun J.-D., Krishna H. A Coding Theory Approach to Error Control in Redundant Residue Number Systems - Part I: Multiple Error Detection and Correction/ / IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing. January 1992. V. 39. № 1. P. 18-34.
  3. Bhardwaj M., Srikanthan T., Clarke C.T. VLSI costs of arithmetic parallelism: a residue reverse conversion perspective // Proceeding ARITH '99 Proceedings of the 14th IEEE Symposium on Computer Arithmetic.
  4. Tel'pukhov D.V. Postroenie obratnykh preobrazovateley modulyarnoy logarifmetiki dlya ustroystv tsifrovoy obrabotki signalov // Informatsionnye tekhnologii. 2011. № 4. Str. 60 - 64.
  5. Amerbaev V.M. Teoreticheskie osnovy mashinnoy arifmetiki // AN KazSSR. In-t matematiki i mekhaniki. Alma-Ata: Nauka. 1976. S. 317-320.
  6. Torgashev V.A. Sistema ostatochnykh klassov i nadezhnost' TsVM. M.: Sovetskoe radio. 1973. 120 s.
  7. Paul D.F. Efficient structure for computing mixed-radix projections from residue number systems// United States Patent № 4752904. Jun. 21, 1988.
  8. http://vscripts.ru/2014/straightforward_error_correction_reverse_converter.php.
  9. http://vscripts.ru/2013/reverse-converter-pipeline-mixed-radix-with-error-correction.php.