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Journal Neurocomputers №6 for 2014 г.
Article in number:
Computing module of the speed multiplying on neuron
Keywords: bits of the multiplier amount of the partial product speed multiplier decoding bits combinations of the bits operations of the adding and shift
Authors:
S. S. Shevelev - Ph.D. (Eng.), Associate Professor, Chair of the Information Security and Communications Network, South-West State University, Kursk, Russia. E-mail: schewelew@mail.ru
Hla Win - Post-graduate Student, Chair of the Information Security and Communications Network, South-West State University, Kursk, Russia. E-mail: hlawin85@gmail.com
Abstract:
Specialized computing module executes the operation of the speed multiplying binary numbers on neuron in direct binary code in format with fixed comma.
Pages: 22,58-26,61
References

 

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