M.N. Rudometkina, V.G. Spitsyn, V.V. Romanenko, V.A. Ettel

In the article the Russian verb-s inflectional processing model is composed, and inflectional regular verb forms model-s decomposition is performed using the developed method of a binary predicate-s functional decomposition. The logical network on a programmable logic-s arrays is built. The results are analyzed. According to hardware analysis, the network built on an actual low-cost programmable logic device is working in three orders faster than a computer program that simulates the same logical network on a PC. To analyze a hardware effectiveness the computer program of the verb-s inflectional processing logical network modeling is developed and tested on a low-power PC with the following parameters: Intel Core Duo T2400 (dual-core processor with a frequency 1.8 GHz), 1GB DDR RAM. The processing speed of a PC is about 2000 verbs per second. However, the processing speed of the modeling program depends on set operation-s realization features. A speed advantage of the hardware verb-s inflectional processing logical network to software is about 2000 times. Thus, the calculations of the size of the logical networks built by different methods to verb-s inflectional processing model is demonstrated that the method of binary predicate-s functional decomposition allow to get the formula-s length in one order smaller than the general-purpose equivalent, obtained by the Cartesian composition.