K.V. Sazonov – Dr.Sc.(Eng.), Associate Professor, 

Mozhaysky Military Space Academy (Saint Petersburg)

E-mail: staffa78@mail.ru

D.A. Tavalinskiy – Dr.Sc.(Eng.), Associate Professor, 

Cherepovets Higher Military Engineering School of Radio Electronics

E-mail: cvviur6@mil.ru

I.V. Abasheva – Post-graduate Student, 

Mozhaysky Military Space Academy (Saint Petersburg)

E-mail: abasheva.izzi@mail.ru

D.A. Khapilina – Engineer, 

Mozhaysky Military Space Academy (Saint Petersburg)

E-mail: dmbs@inbox.ru

The existing dependence of critical systems and critical types of equipment on electronic means (including LSI and VLSI) produced at factories that cannot be fully relied upon, necessitates the development of a new area of research – reverse engineering in microelectronics. In the interests of reproducing the functional analogue of a technical system by analyzing it and using additional available information about its structure and functions, it is advisable to study approaches to a formalized representation of the topology and microarchitecture of integrated circuits.

Purpose of the work is to study methods of formalized presentation of the topology and microarchitecture of integrated circuits in the interest of reproducing a functional analog of a technical system by analyzing it and using additional available information about its structure and functions.

The basic methods of a formalized representation of the topology and microarchitecture of large integrated circuits and ultra-large integrated circuits are considered. Examples are given that show that it is advisable to use HDL SystemVerilog and VHDL to automate the process steps of reverse engineering. When designing LSI and VLSI, it is preferable to use SystemVerilοg.

The descriptions presented allow us to systematize the data obtained after the studies, which can help speed up the process of individual design stages and, accordingly, dynamize the complete reverse engineering process.

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