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Journal Achievements of Modern Radioelectronics №11 for 2016 г.
Article in number:
Implementation of time-frequency synchronization system using composite signal
Authors:
P.V. Sharshavin - Assistant, Department «Radioelectronic Technique of the Information Systems», Siberian Federal University (Krasnoyarsk) E-mail: sharshavin@mail.ru A.S. Kondratiev - Senior Lecturer, Department «Radioelectronic Technique of the Information Systems», Siberian Federal University (Krasnoyarsk) A.V. Grebennikov - Ph.D. (Eng.), Associate Professor, Head of Department «Radioelectronic Technique of the Information Systems», Siberian Federal University (Krasnoyarsk); Head of Department, JSC «Scientific Production Enterprise «Radiosvyaz?»
Abstract:
The time-frequency synchronization error achieved by used synchronization signal set does not meet the present requirements of user synchronization quality. The proposed system using the composite time-frequency synchronization signal (CTFSS) has set of features aimed to reach these requirements. The main feature is cable delay calibration during system operation through double-sided delay measurement (from synchronization source to sink and back) and correction adding. However this feature requires the CTFSS transmission in duplex mode and therefore applying of multiple access methods. It is possible to use time division multiple access (TDMA) for signals sourced from several synchronization sinks since slow cable delay variation and slow rate of required calibration procedures. TDMA if not suitable for signal division between synchronization source and sink because of increasing of synchronization error during calibration caused by low frequency stability of widely used crystal oscillators as frequency reference in synchronization sinks. The best performance for signal division between synchronization source and sink has code division multiple access (CDMA) since exception the effect of frequency relation of cable group delay. The CDMA is implemented using orthogonal modulation technique (BPSK and SinBOC(1,1)) and additional half-epoch delay PRN sequences. Simulation shows that interference suppression reaches the value of 102 dB using 2047 chip sequence and 8 MHz bandwidth at 12-bit ADC. This suppression level is enough for achieve the synchronization error of few picoseconds. The components of proposed system are implemented in MRK-113 equipment designed for verification of GNSS imitators.
Pages: 145-150
References

 

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