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Technique for designing noise-immune designs of high-speed circuit boards

Keywords:

J. S. Atopshev, M. N. Ushkar


The paper is devoted to the development of methods of designing high-speed error noise-immune circuit boards. The concept of noise immunity is complex; it includes protection against external and internal disturbances. In this article the internal noise-immunity. In the paper the following problems were considered. They are: to minimize crosstalk for electrical short lines on the model of the active-passive line or on the model of the active-passive-active, to minimize the interference of reflections and crosstalk for electrical long transmissions lines and differential transmission lines, reduction of the interference of power circuits. The solution to these problems can be solved by using techniques which include algorithms of pretopological and posttopological analysis. Algorithm of predtopological analysis ensures the formation of criteria and rules for interactive and automatic tracing of the PCB resistanted to internal noise. The analysis required to have electrical schematic diagram of the device, device characteristics, parameters of the elements, the value of the noise immunity circuits. Calculations of parameters of transmission lines are performed in special software tools or manually. This analysis is focused on computer-aided design, allowing force to limit the length of conductors and regions of interaction between two or more conductors. Algorithm of posttopological analysis provides verification of the specified design rules and parameters of the printed circuit board transmission lines. The analysis required to have topology resulting from the design and parameters of transmission lines formed in predtopological analysis. The algorithm performs the control of the lengths of transmission lines and the length of the interaction of neighboring conductors. This analysis are focused on computer-aided design, permit a rapid analysis of the internal noise immunity and a detailed analysis of the noise immunity of PCBs. Efficiency of the method illustrated by the example of designing a high-speed circuit board digital filter operating at frequencies above 500 MHz.
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