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Empirical evaluation of three-dimensional navigation systems’ airborne computers’ computing stability and fault tolerance

Keywords:

G. M. Alakoz, I. N. Beloglazov, M. M. Kolleganov, R. V. Svetlov


Accuracy of aircraft district location determination in changing daily, weather climatic conditions is crucial factor which civil and military aviation usage efficiency and sometimes appropriateness is dependent on. Despite permanent inertial and satellite navigating systems, which all modern aircrafts are equipped, performance quality improvement still required accuracy of aircraft district location determination is not reached. This fact still forces to use three-dimensional navigating systems which are installed aboard of specialized aircrafts for civil applications and which are essential for military aircraft of 5th generation. Latest three-dimensional navigating systems investigations shows that their performance accuracy improvement requires joint use of methods and algorithms of estimation, identification and test of hypothesis during stereoscopic pairs of large ground images real-time processing. Therefore success of three-dimensional navigating systems practical usage is mainly defined by performance, computing stability and fault tolerance of onboard computing systems which are dominantly based on RISC-processors and FPGA-video-processors (Field Programmable Gate Array). The received empirical estimations of required performance, computing stability and fault tolerance shows: 1. The elementary searchless district location determination based on one stereopair processing requires (0,12-0,6) *108 operations of multiplication and addition. Such a task is able to be processed in 1 second by RISC-processor with performance not below some Gflops, taking into account computing organization system time costs. 2. If micro program management intermediate level is presented in FPGA-technologies based on VHDL than algorithmically-focused MIMD-bit-stream three-dimensional navigating systems videoprocessor is potentially implementable on the basis of one VLSI FPGA Xilinx Virtex 6. Such a processor is possible to achieve performance of V=FT*Lp/n=500*106*192/641,5*109 operations per second in double-format. This performance rate is enough for target size stereopairs processing rate of 25125 images per second so given performance exceeds algorithmic costs for one required format stereopair processing exactly this amount of times. Here: FT – bit-matrix clock rate, Lp – one cycle operations quantity, n – arithmetics capacity. It is fundamental that there are no system time costs on real-time computing resources management in MIMD-bit-stream computing technologies so that computing expenses become comparable with algorithmic in such videoprocessors. 3. Despite the fact that required by three-dimensional navigating systems algorithms computing performance and accuracy are achievable both in RISC-architecture and specialized FPGA-based architectures, 5th generation aircrafts such as F-35 should stabilize flight parameters, used for high-precision own location determination, which is realizable only at its separate stages. At the same time it should be kept in mind that computing paralleling index increase more than 4 times may lead to loss of onboard three-dimensional navigating system computer based on RISC-platforms computing stability. 4. RISC-architecture fault tolerance more than 10 times less than specialized FPGA-bit-stream architectures one. It is the most essential for spaceships which lifetime should exceed VLSI components nonfailure operating time more than 10 times. Such fault tolerance indicators qualitative divergence is caused by: - indifferent failures presence in bit-stream architectures which quantity exceeds ratio of failures parried by RISC-architecture processors majority reservation schemes; - possibility of ~112 times bit-stream microprograms field re-allocation on a bit matrix tolerantly operating failure map.
References:
May 29, 2020

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