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Structural-and-functional organization of the arbiter of the inquiry parallel processing


E. A. Titenko, E. A. Semenikhin, E. A. Petrik, D. A. Voronin

In this article the authors examine the hardware realization of the parallel algorithm for searching the first logical «1». There was developed the two- level organization of the device-arbiter with MIPS-method of the calculations. The first level of calculation is the start point of the process of the parallel search. In the second level of the search of first logical «1» in all groups of the cell is performed. The particularities of the calculations connect with the variable time of search of the first logical «1».
June 24, 2020
May 29, 2020

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