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Method for tracking the delay of the navigation signal code sequence

DOI 10.18127/j20700784-201812-10

Keywords:

S.О. Kirillov – Student, Siberian Federal University (Krasnoyarsk)
E-mail: kirillov_so@mail.ru
N.N. Ovchinnikov – Student, Siberian Federal University (Krasnoyarsk)
E-mail: nikitaov496@gmail.com
A.V. Sokolovskiy – Research Scientist, Siberian Federal University (Krasnoyarsk)
E-mail: sokolovskii_a@mail.ru
D.V. Kapulin – Ph.D. (Eng.), Associate Professor, Head of Department «Information Technologies on Radioelectronic Production», Siberian Federal University (Krasnoyarsk)
E-mail: dkapulin@sfu-kras.ru


In recent years, the main stream, based on the fully software implementation of navigation equipment elements is intensively devel-oping. In this case, it can be performed on programmable general-purpose processors or on digital signal processing processors. To ensure high accuracy in calculating the coordinates of an object in real time, it is necessary to process a large amount of information at the analog-to-digital conversion speed of the received navigation signal, that is, at a frequency of more than 100 MHz. In design process of navigation equipment it is necessary to consider the delay of navigation signal, received from satellite, using various tracking schemes. In this paper, it is proposed a method of code sequence tracking from satellite using CORDIC algorithm. The design solution based on the CORDIC implies tracking the delay of the code sequence, which allows to minimize the influence of the signal level coming from the satellite. The proposed tracking scheme can be implemented both on FPGA, and ASIC, specially designed for solving navigation problems. This design solution allows minimizing the resource or time costs depending on the conditions of the problem by switching the different types of multiplier architectures. For testing the tracking scheme it is recommends to use an automated verification technique based on the mixing of injection’s errors in correlators. The navigation equipment correlator is a set of adder combined according to the pyramidal principle, that is, it consists of layers, which in turn consist of summers. Verification of the operation of the tracking scheme is realized by injecting of errors with the result of the calculation, given by the adder. To do this, intermediate buffers are stored in the correlator to store the results of the summation between the layers. In the buffer part, random errors are injected using the M-sequence generator, which must be detected during verification. Also for verification purposes, it is necessary to obtain the work data of the tracking device for the navigation signal. To do this, the operators added data to the correlator for writing data to files for easy processing. The results from the first run are considered standard and are used for further verification. Subsequent launches of the device are made with mixing of errors. Initially, all the correlators of the tracking scheme produced at least 5 errors, and from the original data it is impossible to determine the device with the greatest number of errors. This is because when an error occurs in the correlator on one of the layers, this error goes to the next layers of the correlator, so subsequent layers also produce incorrect data, regardless of whether they have errors or not. The automated verification technique for tracking the delay of the navigation signal makes it possible to check various elements of the circuit at the design stage, which reduces the time costs without increasing the risks of undetectable errors during the operation of the device.

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