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Forced synthesis of processor facility’s specified goal state: concept of control interception

Keywords:

V.I. Nikolaev – Dr. Sc. (Eng.), Professor, Scientific Assistant, JSC «Concern «Sozvezdie» (Voronez). E-mail: nikolaev@sozvezdie.su N.N. Tolstyh – Dr. Sc. (Eng.), Professor, Head of Office, JSC «Concern «Sozvezdie» (Voronez). E-mail: tnn@sozvezdie.su A.G. Alferov – Ph. D. (Eng.), JSC «Concern «Sozvezdie» (Voronez). E-mail: office@sozvezdie.su Yu.A. Stepanets – Senior Programmer, JSC «Concern «Sozvezdie» (Voronez). E-mail: juliastepanetz@gmail.com I.O. Tolstyh – Ph. D. (Eng.), Leading Specialist, JSC «Concern «Sozvezdie» (Voronez). E-mail: office@sozvezdie.su N.G. Roldugin – Deputy Commander of Department, JSC «Concern «Sozvezdie» (Voronez). E-mail: office@sozvezdie.su M.V. Artemov – Student, Specialist, JSC «Concern «Sozvezdie» (Voronez). E-mail: amvqqq@gmail.com


A comprehensive approach to exercising information influence directed at processor facility’s goal states implementation is investigated. The rank of «control interception» task within information conflict’s representation as an interaction of two or more competitive processes in infocommunication system is considered.
References:

 

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