Publishing house Radiotekhnika

"Publishing house Radiotekhnika":
scientific and technical literature.
Books and journals of publishing houses: IPRZHR, RS-PRESS, SCIENCE-PRESS

Тел.: +7 (495) 625-9241


Method of FPGA-based implementation of sponsored access to exchange platforms


V.M. Florov – Head of Department, «EXACTPRO» LCC (Kostroma). E-mail: P.I. Garin – Programmer, «EXACTPRO» LCC (Kostroma). E-mail: P.V. Smirnov – Programmer, «EXACTPRO» LCC (Kostroma). E-mail: M.A. Metelkov – Programmer, «EXACTPRO» LCC (Kostroma). E-mail:

The article describes the implementation of the sponsored access to Exchange through an FPGA-board with several network connections. A method is proposed to decrease the latency of packets passing achieved by early transmission of those packets, which have not yet gone through full processing (reception). The article describes the tools used for testing the developed system, the procedure of verifying the correctness of its functioning and the mechanism of latency measurements.


  1. John W. Lockwood, Adwait Gupte, Nishit Mehta. A Low-Latency Library in FPGA Hardware for High-Frequency Trading (HFT) // Proceedings of the IEEE 20th Annual Symposium on High-Performance Interconnects. 2012.
  2. Group A. High Frequency Trading in the Futures Markets. 2010.
  3. Christian Leber, Benjamin Geib. High Frequency Trading Acceleration using FPGAs // Proceedings of the 21st International Conference on Field Programmable Logic and Applications (FPL 2011). 2011.
  4. Brogaard J.A. High Frequency Trading and Its Impact on Market Quality // Proceedings of the 5th Annual Conference on Empirical Legal Studies. 2010.
  5. Larsen S. and Sarangam P. Architectural Breakdown of End-to-End Latency in a TCP/IP Network // International Journal of Parallel Programming. Springer. 2009.
  6.; 01.01.2015.
  7. adapters.html; 12.01.2015.
  8. Subramoni H., Petrini F., Agarwal V., Pasetto D. Streaming, low latency communication in on-line trading systems // Proceedings of the International Symposium on Parallel & Distributed Processing, Workshops (IPDPSW). 2010.
  9.; 12.01.2015.
  10.; 12.01.2015.
  11.; 01.01.2015.
  12.; 01.01.2015.
  13.; 01.01.2015.
  14.; 01.01.2015.
  15. Morris G.W., Thomas D.B., Luk W. FPGA Accelerated Low Latency Market Data Feed Processing // Proceedings of the 17th IEEE Symposium on High Performance Interconnects. 2009.
  16.; 23.01.2015.
  17.; 23.01.2015.
  18.; 23.01.2015.
  19. product_specification_revd.pdf; 23.01.2015.
  20.; 23.01.2015.
  21.; 01.01.2015.
  22.; 01.01.2015.
  23.; 01.01.2015.
  24.; 01.01.2015.
  25. Mueller R., Teubner J., Alonso G. Streams on wires: a query compiler for FPGAs // Proc. VLDB Endowment. V. 2. № 1. 2009.
  26. components/finance-ip/market-data-decoders.html; 12.01.2015.
  27. services/millennium-exchange/millennium-exchange- migration/mit303.pdf; 12.01.2015.


© Издательство «РАДИОТЕХНИКА», 2004-2017            Тел.: (495) 625-9241                   Designed by [SWAP]Studio