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Logarithmic detector for receiving chaotic radio pulses of 35 GHz band on CMOS 65 nm technology

Keywords:

E.V. Efremova, A.A. Chebelev


Logarithmic detector circuit for receiver of chaotic radio pulses of 3-5 GHz range on CMOS UMC 65 nm technology is simulated in custom IC design package Cadence IC. The detector structure is a cascade of amplifier and detector blocks, here, nine amplifier and three detector blocks. Each amplifier unit has 5.5 dB gain. Power consumption of amplifier block is less than 1.5 mW, and detector block less than 3 mW. Main characteristics of resulting model are investigated. Operation range of the device is –65...–10 dBm, admissible input signal level up to 10 dBm, detector sensitivity –70 dBm. Power consumption depends on the input signal level, it is less than 30 mW, power supply 1.2 V.
References:
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